Exploiting Speculative Value Reuse Using Value Prediction

Liao, C.-H. and Shieh, J.-J.

Data dependencies between instructions greatly impede instruction-level parallelism. Recently two hardware techniques - Value Prediction and Value Reuse - have been proposed to overcome the limits imposed by data dependencies. We introduce a new hardware scheme for exploiting speculative value reuse by using value prediction. We propose a new microarchitecture which uses value prediction to provide speculative value reuse. We use Value Prediction to predict operands of all integer ALU instructions and all load/store instructions. Value Reuse - including speculative and non-speculative reuse - is used for repeating instructions. Repeating instructions, which are found by a value reuse test, are those instructions which are executed repeatedly with the same input values and produce the same results. We use execution-driven simulation to evaluate the performance of our scheme. On average, we found ~9% speedup over a baseline architecture and ~84% correctly predicted speculative value reuse in speculative reuse lookup operations (~5.7% of executed instructions).

Cite as: Liao, C.-H. and Shieh, J.-J. (2002). Exploiting Speculative Value Reuse Using Value Prediction. In Proc. Seventh Asia-Pacific Computer Systems Architectures Conference (ACSAC2002), Melbourne, Australia. CRPIT, 6. Lai, F. and Morris, J., Eds. ACS. 101-108.

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