Implementation of a Triple Modular Redundant FPGA based Safety Critical Systems for Reliable Software Execution

Vasudevan, V., Waldeck, P., Mehta, H. and Bergmann, N.

This paper describes the implementation of a TMR (Triple Modular Redundant) microprocessor system on a FPGA. The system exhibits true redundancy in that all three instances of the same processor system (both hardware and software) are executed in parallel. The described system uses software to control external peripherals and a voter is used to output correct results. An error indication is asserted whenever two of the three outputs match or all three disagree. The software has been implemented to conform to a particular safety critical coding guideline/standard which is popular in industry. The system was verified by injecting various faults into it.

Cite as: Vasudevan, V., Waldeck, P., Mehta, H. and Bergmann, N. (2006). Implementation of a Triple Modular Redundant FPGA based Safety Critical Systems for Reliable Software Execution. In Proc. Eleventh Australian Workshop on Safety-Related Programmable Systems (SCS 2006), Melbourne, Australia. CRPIT, 69. Cant, T., Ed. ACS. 113-119.

(from crpit.com) (local if available)