A Stack-Based Concatenative Approach to Co-processor Simulation and Code Generation

Jakob, C. and Beckett, P.

As we run to the end of the silicon roadmap, the rapidly escalating cost of design, fabrication and test in future systems-on-chip may justify a re-evaluation of homogeneous reconfigurable mesh architectures. Ultimately, the geometric constraints of extreme nanoscale device layout may support only simple functional arrays with predominately nearest neighbour connectivity. However, these have proved to be difficult to configure and program effectively as even small load imbalances, unnecessary synchronization overheads or delayed accesses to remote data can prevent typical applications from running efficiently on large distributed arrays of processors. We describe an approach to the problem of configuring a system-on- chip comprising an array of small interconnected processors that imposes a common structure on distributed programs and trades some code efficiency for ease of programming and ease of verification. Zeta is a stack-based, concatenative language that bears some similarity to Forth. It has been developed to manage the complexities of simulation and code generation in this multi-coprocessor environment. Zeta programs implement the computation and connections of directed acyclic graphs (DAGs) by manipulating a stack of state variables. State information can be passed forward (in time) through the directed acyclic graph as needed using a virtual bus construct. This paper describes the key features of the language and illustrates its use via an example implementation of an LDPC decoder.

Cite as: Jakob, C. and Beckett, P. (2015). A Stack-Based Concatenative Approach to Co-processor Simulation and Code Generation. In Proc. 13th Australasian Symposium on Parallel and Distributed Computing (AusPDC 2015) Sydney, Australia. CRPIT, 163. Javadi, B. and Garg, S.K. Eds., ACS. 31-40

(from crpit.com) (local if available)